Digital Frequency Division Bat Detector: Design brief

Design brief

These pages describe the design of a simple frequency division bat detector using CMOS IC's.  They also provide results of measurements in support of this design made by the 2000 year group of HND1 Electrical and Electronic Engineering at the University of Northumbria.
Plans are provided that will show you how to build this simple detector.

The brief was to design and make a bat detector that would meet the following requirements:

Design requirements:

  • detect bats without tuning
  • be suitable for novices to build and use
  • have a low component count and
  • use readily available digital IC components to create a design
  • backed up by our own measurements.

Block diagram

The block diagram shows the circuit sections for a simple frequency division bat detector. The signal from the microphone is filtered to remove interference and amplified, then frequency divided using a counter.  A Schmitt trigger circuit prevents false counts. An audio amplifier takes the filtered output from the counter, and feeds headphones.  Loudspeakers aren't used with this frequency division detector because the output signal contains an amplified copy of the input signal, and this can produce oscillation.


Experimental procedure: a Motorola piezo ceramic tweeter with a response from 20 - 70kHz  was set up facing the microphone, at a distance of 120mm from it.  A signal of 1V at various frequencies was applied to the tweeter, and the size of the signal at the receiver was recorded. The output from the piezo receiver peaked at nearly 100 mV.  By comparison an electret microphone gave a signal of less than 1 mV at all frequencies above 20kHz.

We used a SN35610 piezo receiver which gave the following results; when loaded with only a 100k resistor the sensor showed a narrow peak response at 42kHz with a 6dB bandwidth of about 1kHz.  This graph shows the effect of adding a 10mH inductor in parallel across the sensor, which now has a useful bandwidth between 25Hz and 60kHz.

For our design we chose to use a piezo sensor since our results showed it was much more sensitive than electret, capacitor or piezo-tweeter.



We chose to use a CMOS hex inverter type HEF4069UBP to build the preamplifier and Schmitt trigger.

Here you can see the DC characteristic for a single gate.  

We chose Vsupply = 9.00V for all our measurements, as we are going to use a 9V battery.

The gate provides a maximum open-loop gain of about 25 at the centre of its transition region where Vin = 4.3V
(NB this is not Vsupply / 2)

We made a single stage amplifier around a CMOS inverter, with an input resistor of 100k and a feedback resistor of 1M.

The circuit is a classical shunt voltage feedback amplifier. We expected a gain of ten.

However because the open loop gain is not very big we need to use a more complicated expression for the closed loop gain Acl.

Acl = (Rf/Ri+Rf) * (Aol/(1+BAol) ............ where B = Ri/(Rf+Ri)

whence Acl = (1/1.1)*(25/1+.091*25)

Acl = 0.909*25/3.27 = 6.94 ...................this is in close agreement with our experimental results.

This investigation showed that in principle the hex inverter circuit chosen would be suitable for our detector provided more gain was available. We decided to try a three stage amplifier based on the same IC.

Next page: Details of the three stage amplifier and schmitt trigger circuit.